The present invention generally relates to a method for manufacturing a semiconductor device, and the semiconductor device manufactured according to the method. More particularly, it relates to a method for removing poly silicon stringers during the fabrication of a semiconductor memory device, without damaging the profile of the semiconductor memory device, and the semiconductor memory device manufactured according to the method.
Conventionally, fabricating a semiconductor memory device, such as a flash memory device or a charge-trapping device, involves at least three stages, including a first stage for providing columns of isolation structures and defining active regions in a substrate; a second stage for providing rows of memory cells on the substrate; and a third stage for providing an interlayer insulating film on the array of memory cells and forming wiring layers. FIG. 1A shows a three dimensional (3D) perspective view of a semiconductor memory device 100 obtained near the end of the second stage in prior art. The semiconductor memory device 100 comprises a substrate 101 and a plurality of isolation structures 102. The plurality of isolation structures 102 defines a plurality of active regions 101a to 101d in the substrate 101. The semiconductor memory device 100 further comprises a plurality of rows of memory cells provided on the substrate 101. Each row of memory cell comprises a patterned first dielectric layer 103, a patterned first conductive layer 104, a second dielectric layer 105, a second conductive layer 106 and a third dielectric layer 107.
Many different methods and processes may be applied for manufacturing the semiconductor memory device 100 shown in FIG. 1A. For example, the plurality of isolation structures 102 may first be provided in the substrate 101. The patterned first dielectric layer 103 may be provided together with the plurality of isolation structures 102. Subsequently, the patterned first conductive layer 104, the second dielectric layer 105, the second conductive layer 106, and the third dielectric layer 107 may be provided on the substrate 101. Following which, an etching processes may be carried out to form the rows of memory cells as shown in FIG. 1A.
FIG. 1B is a magnified view of portion A in FIG. 1A. It is a cross-sectional view of the semiconductor device 100 in a region between two adjacent rows of memory cells in a direction parallel to the rows of memory cells. After the etching processes, poly silicon stringers 104a, which are residues of the patterned first conductive layer 104, often remain on the patterned first dielectric layer 103 as shown in FIG. 1B. The poly silicon stringers 104a may cause current to flow from a memory cell in a first row to another memory cell in an adjacent row, and thus have to be removed. Conventionally, the poly silicon stringers 104a are removed by wet etching treatment. However, removing poly silicon stringers using the conventional methods may often damage the profile of the semiconductor memory device. Moreover, wet etching treatments make the controlling of the critical dimension of the semiconductor memory device difficult. Therefore, it is desirable to provide a method for manufacturing a semiconductor memory device involving a step for removing the poly silicon stringers completely, without damaging the profile of the semiconductor memory device.